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RISC-V: The Open Era of
Computing
Calista Redmond
CEO, RISC-V International
Welcome to the
open era of
computing.
RISC-V is the free and open
Instruction Set Architecture…
… Driven through open
collaboration
… Enabling freedom of design
across all domains and
industries
… Cementing the strategic
foundation of semiconductors
Disruptive Technology
Barriers Legacy ISA RISC-V ISA
Complexity
1500+ base instructions
Incremental ISA
47 base instructions
Modular ISA
Design freedom $$$ – Limited Free – Unlimited
License and Royalty fees $$$ Free
Design ecosystem Moderate Growing rapidly. Numerous
extensions, open and
proprietary cores
Software ecosystem Extensive Growing rapidly
Industry innovation on RISC-V
Hardware
– RV64, multi-heart
CPUs, vectors,
bit manipulation,
hypervisors, debug mode –
AI SoCs
Application
processors
Software
Linux
Drivers
AI Compilers
Hardware
– RV32, privilege
modes, interrupts –
IoT SoCs
Microcontrollers
Software
RTOS
Firmware
Hardware
– RV32 –
Proof of Concept SoCs
Minion processors for
power management,
communications, …
Software
Bare metal software
Hardware
ISA Definition
Test Chips
Software
Tests
Complexity
2010 – 2016 2017 – 2018 2019 – 2020 2021
Unconstrained Opportunity
Barriers removed
 Design risk
 Cost of entry
 Partner limitations
 Supply chain
5
RISC-V Business Model
Collaboration
partners
Expanded
geographies
Supply chain
Expanded
markets
Development
Beyond removing barriers,
RISC-V fuels our community to
seize growing opportunities
By 2025, 40% of
application-specific
integrated circuits
(ASICs) will be designed
by OEMs, up from
around 30% today.
Custom ICs Based on RISC-V Will Enable
Cost-Effective IoT Product
Differentiation
Gartner, June 2020
Source:Gartner
Source:Gartner
ID: 46523_C
RISC-V’s open model will spur adoption by cloud service
providers and streamline resources for chip vendors
30 billion
connected
and IoT
devices
demand
security and
custom
processors
Source:Strategy Analytics
Rapid RISC-V growth led by industrial
Semico Research predicts the
market will consume 62.4
billion RISC-V CPU cores by
2025, a 146.2% CAGR 2018-
2025. The industrial sector to
lead with 16.7 billion cores.
62.4 billion RISC-V CPU cores
by 2025
Source:Semico Research Corp
Nearly a quarter of designs incorporate RISC-V
Wilson Research Group/Siemens
found that 23% of ASIC and
FPGA projects incorporated
RISC-V in at least one processor
in a double-blind 2020 study.
Source:Tractica
The total market for
RISC-V IP and
Software is expected
to grow to $1.07
billion by 2025 at a
CAGR of 54.1%
RISC-V IP, SW, and Tools build momentum
RISC-V
adoption
spans
industries
and
workloads
Cloud and
data center top
providers like Amazon and
Alibaba are designing their
own chips.
Automotive
is transforming from
autonomous vehicles to
infotainment to safety, the
whole vehicle relies on
innovative electronics.
Industrial IoT
incorporating artificial
intelligence in manufacturing
and industrial processes.
Mobile and
wireless continue rapid
evolution with each generation of
hardware and increased
capability.
Consumer and
IoT devices bring
incredible innovation and volume
with billions of connected devices
in the next 5-10 years.
Memorywas largest
semiconductor category by sales
with $158 billion in 2018, and the
fastest-growing.
Nearly 1,400 RISC-V Members
across 70 Countries
14
December 2020
93 Chip
SoC, IP, FPGA
4 I/O
Memory, network, storage
11 Services
Fab, design services
39 Software
Dev tools, firmware, OS
4 Systems
ODM, OEM
12 Industry
Cloud, mobile, HPC, ML, automotive
78 Research
Universities, Labs, other alliances
1,000+ Individuals
RISC-V engineers and advocates
In 2020, RISC-V membership grew 133%
Dedicated Community
15
15
Services Fab,
design services
Press and Analysts
Chip SoC, IP, FPGA
Investors and Funding
sources
Universities
and Research
Industry cloud,
mobile, HPC, ML,
automotive
I/O Memory,
network, storage
Software Dev tools,
firmware, OS
Individual Advocates
Incredible industry progress
• The European Processor Initiative finalized the
first version of its RISC-V accelerator
architecture and will deliver test chip in 2021.
• The RIOS Lab announced PicoRio, an
affordable RISC-V open source small-board
computer available in 2021.
• Imperas announced first RISC-V verification
reference model with UVM encapsulation.
• Seagate announced hard disk drive
controller with high-performance RISC-V CPU.
• GreenWaves ultra-low power GAP9
hearables platform enabling scene-aware
and neural network-based noise reduction.
• Alibaba unveiled RV64GCV core in its Xuantie
910 processor for cloud and edge servers.
• Microchip released the first SoC FPGA
development kit based on the RISC-V ISA.
• Andes released superscalar multicore and L2
cache controller processors.
• StarFive released the world’s first RISC-V AI
visual processing platform
• SiFive unveiled world’s fastest development
board for RISC-V Personal Computers.
• Micro Magic announced an incredibly fast 64-
bit RISC-V core achieving 5GHz and 13,000
CoreMarks at 1.1V.
RISC-V is the
foundation of
the open era of
computing
… 2,800+ individuals in 60+ RISC-V
work groups and committees
… 283 RISC-V solutions online including
cores, SoCs, software, tools and developer
boards.
… 29 local RISC-V community groups,
with more than 5,400 engineers
… We’re in the news! We have 33k+
followers on social media and
across the last year, we have participated in
135+ news articles along with
amplifying RISC-V community news 450+
times.
RISC-V delivers incredible
member support
Learning + Talent
Multi-level online learning
Connecting universities with
labs, tests, and curricula
RISC-V Training Partners
Visibility
Constant drumbeat through
press, media, and original
content
Industry and regional events
Dedicated RISC-V events
Technical
Deliverables
Guard against fragmentation
Build technical deliverables
Work groups
Compliance +
Verification
Testing and compliance suites
Compliance tests
Advocacy
Technical advocate program
Local developer groups and
events
RISC-V Ambassadors
Geo and industry alliances
Marketplace
Exchange
Online marketplace of
providers, products, and
services
Technical developer forums
Build RISC-V into
your company
strategy, and your
personal mission
RISC-V is a community of passionate,
dedicated, and invested stakeholders
As individuals
As companies
As universities
As public institutions and non-profits
As nations
As one Global, connected movement
19
“The future of American industry
depends on open source tech, …
RISC-V is gaining traction in the
hardware manufacturing space
throughout the world, because it
lowers barriers to entry and increases
chip development speed.”
-- Wired
“Though the architecture was created a
decade ago by university professors,
RISC-V has been building its ecosystem
for years and has started to hit its stride
with big licensees like Western Digital,
SiFive, and even NVIDIA itself.”
-- VentureBeat
“If it succeeds, RISC-V could lower the cost of developing a new chip and help
companies of all sizes to build exactly the processors they need.”
-- Engadget
Thank you
@risc_v
@Calista_Redmond
risc-v-international
calistaredmond
www.riscv.org
Benefit
of
joining
RISC-V
✔ Accelerate technical traction and insight
✔ Contribute technical priorities, approaches, and code
✔ Gain strategic and technical advantage
✔ Increase visibility, leadership, and market insight
✔ Fill and increase engineering skills, retain and attract
talent
✔ Build innovation partner network and customer
pipeline
✔ Deepen, engage, and lead in local and industry
developer network
✔ Showcase RISC-V products, services, training, and
resources
Membership options
Community Member Benefits
• Accelerated development, reduced risk
through open source, ratified ISA.
• May participate in workgroups, influence
strategy and adoption
• 6 support programs in Technical
Deliverables, Compliance, Visibility, Learning,
Advocacy, and Marketplace
• 1 voting Academic Board rep,
• 1 non-voting Community Board rep
• Member listing on RISC-V website
• Event registration discount
Strategic Member Benefits
• Community level benefits plus…
• Use of RISC-V Trademark for
commercialization
• 3 Board reps elected for tier, includes
Premier members that do not otherwise
have a board seat.
• May lead workgroup and/or committee
• Solution listing on RISC-V Exchange
• 1 case study a year, 1 blog per month
• 1 social media spotlight per month
Premier Member Benefits
• Community level benefits plus…
• Use of RISC-V Trademark for
commercialization
• Board seat and Technical Steering
Committee seat included for $250k level
• Technical Steering Committee seat included
for $100k level
• Solution listing on RISC-V Exchange
• 4 case studies a year, 2 blogs per month
• 2 social media spotlights per month
• Spotlight member profile
• Inclusion in event promotions
Premier Member Requirements
• Membership open to any type of legal entity,
not open to individual members
• $250k Annual membership includes Board
seat and Technical Steering Committee seat
• $100k Annual membership includes TSC seat
Strategic Member Requirements
• Membership open to any type of legal entity,
not open to individual members
• Annual membership based on employee size
• $35k for 5,000+ employees
• $15k for 500-5,000 employees
• $5k for <500 employees
• $2.5k for <10 employees / company <2
years old
Community Member Requirements
• Membership open to academic institutions,
non-profits, and individuals not representing
a legal entity
• No annual membership fee
23
Horizontals
(Attributes)
Standing
Committee
Security
Subcommittee
Testing
Subcommittee
Crypto TG
Security Response TG
Performance
Subcommittee
Functional Safety SIG
ISA Infrastructure
Subcommittee
Formal Model TG
Architecture tests TG
Documentation
Debug revision TG
Trace TG
Nexus TG
Simulators TG
Embedded
Subcommittee
Code Size Reduction TS
Unprivileged
SC
B (bitmanip) TG
P (packed dec) TG
Zfinx TG
Alt FP Formats TG
J (jit) TG
V (vector) TG
IMAFDCQ extensions
Memory Model
・Opcodes
・L extension
Privileged
SC
Hypervisor TG
Virtual Memory TG
Fast Interrupts TG
Trusted Exec (TEE) TG
Cache Mgmt (CMO) TG
interrupts
Privileged Spec 1.11
Verticals
SC
・Automotive
・Consumer
・Datacenter
・Energy
・Finance
・Communications
・Defense
RASD
(Recoverability,
Availability,
Serviceability
Dependability) TS
・Functional Safety
・E2E Data Integrity
・Diagnosability
・Recoverability
・PCIe error reporting
・Data poisoning
containment
・Error recording
・Error reporting
・Error isolation
Board of Directors (BOD)
Technical Steering Committee (TSC) Chairs
Software
Standing
Committee
Profiles & Platform
Subcommittee
・Linux class OSs
・RTOSs
・DMA
・Multi-processing
・Hypervisors
・JITs
・Overlays
・IOMMU, Buses
・Bootloaders
・Distro coord/build/rel
・*BIs
Tool Chain &
Runtimes
Subcommittee HPC SIG
Code Speed SIG
EABI TG
Managed Runtime TG
DB/App TG
AI/ML/NLP TG
・Native code
・GCC
・LLVM
・Optimizer
・Profiler
・gdb
・Profiles
・MCU profile
・Virtual
machines
・Interpreters
・JITs
・Frameworks
(Spark, Hadoop,
etc.)
・Benchmarks
・Libraries
・Benchmarks
・Libraries
・Benchmarks
SC: Standing Committee
TS: Technical
Subcommittee
TG: Task Group
SIG: Special Interest
Completed Area of Responsibility
Proposed
SOC Infrastructure
Subcommittee
Config TG
• Toolchain
improvements
• Further extensions
Technical Groups
RISC-V launched
new programs
to support
member success
 RISC-V Technical Steering
Committee to govern technical
strategy, build technical leadership
and best practice decision-making
 RISC-V Learn encompassing
university curricula, online learning
and Training Partners
 RISC-V Ambassadors and Alliances
to reach beyond our community for
industry collaboration, leadership,
and technical engagement.
 RISC-V Exchange to showcase RISC-V
cores, SoCs, developer boards,
software, tools and other resources.
From Embedded to Enterprise
• The EU Horizon 2020 De-RISC
platform for aerospace has achieved
several hardware and software
milestones since it began a year ago.
• The School of Computing at the Tokyo
Institute of Technology developed a
portable Linux RISC-V SoC design in
just 5,000 lines of Verilog.
• Huami released a new RISC-V based
AI chip for biometric wearables
• CHIPS Alliance announced
enhancements to the RISC-V SweRV
Core EH2, the world’s first dual-
threaded, commercial, embedded
RISC-V core and SweRV Core EL2, an
ultra-small, ultra-low-power RISC-V
core.
• Alibaba unveiled its RISC-V RV64GCV
core that will be used for its Xuantie
910 processor aimed at cloud and
edge servers.

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RISC-V: The Open Era of Computing

  • 1. RISC-V: The Open Era of Computing Calista Redmond CEO, RISC-V International
  • 2. Welcome to the open era of computing. RISC-V is the free and open Instruction Set Architecture… … Driven through open collaboration … Enabling freedom of design across all domains and industries … Cementing the strategic foundation of semiconductors
  • 3. Disruptive Technology Barriers Legacy ISA RISC-V ISA Complexity 1500+ base instructions Incremental ISA 47 base instructions Modular ISA Design freedom $$$ – Limited Free – Unlimited License and Royalty fees $$$ Free Design ecosystem Moderate Growing rapidly. Numerous extensions, open and proprietary cores Software ecosystem Extensive Growing rapidly
  • 4. Industry innovation on RISC-V Hardware – RV64, multi-heart CPUs, vectors, bit manipulation, hypervisors, debug mode – AI SoCs Application processors Software Linux Drivers AI Compilers Hardware – RV32, privilege modes, interrupts – IoT SoCs Microcontrollers Software RTOS Firmware Hardware – RV32 – Proof of Concept SoCs Minion processors for power management, communications, … Software Bare metal software Hardware ISA Definition Test Chips Software Tests Complexity 2010 – 2016 2017 – 2018 2019 – 2020 2021
  • 5. Unconstrained Opportunity Barriers removed  Design risk  Cost of entry  Partner limitations  Supply chain 5 RISC-V Business Model Collaboration partners Expanded geographies Supply chain Expanded markets Development
  • 6. Beyond removing barriers, RISC-V fuels our community to seize growing opportunities
  • 7. By 2025, 40% of application-specific integrated circuits (ASICs) will be designed by OEMs, up from around 30% today. Custom ICs Based on RISC-V Will Enable Cost-Effective IoT Product Differentiation Gartner, June 2020 Source:Gartner
  • 8. Source:Gartner ID: 46523_C RISC-V’s open model will spur adoption by cloud service providers and streamline resources for chip vendors
  • 9. 30 billion connected and IoT devices demand security and custom processors Source:Strategy Analytics
  • 10. Rapid RISC-V growth led by industrial Semico Research predicts the market will consume 62.4 billion RISC-V CPU cores by 2025, a 146.2% CAGR 2018- 2025. The industrial sector to lead with 16.7 billion cores. 62.4 billion RISC-V CPU cores by 2025 Source:Semico Research Corp
  • 11. Nearly a quarter of designs incorporate RISC-V Wilson Research Group/Siemens found that 23% of ASIC and FPGA projects incorporated RISC-V in at least one processor in a double-blind 2020 study.
  • 12. Source:Tractica The total market for RISC-V IP and Software is expected to grow to $1.07 billion by 2025 at a CAGR of 54.1% RISC-V IP, SW, and Tools build momentum
  • 13. RISC-V adoption spans industries and workloads Cloud and data center top providers like Amazon and Alibaba are designing their own chips. Automotive is transforming from autonomous vehicles to infotainment to safety, the whole vehicle relies on innovative electronics. Industrial IoT incorporating artificial intelligence in manufacturing and industrial processes. Mobile and wireless continue rapid evolution with each generation of hardware and increased capability. Consumer and IoT devices bring incredible innovation and volume with billions of connected devices in the next 5-10 years. Memorywas largest semiconductor category by sales with $158 billion in 2018, and the fastest-growing.
  • 14. Nearly 1,400 RISC-V Members across 70 Countries 14 December 2020 93 Chip SoC, IP, FPGA 4 I/O Memory, network, storage 11 Services Fab, design services 39 Software Dev tools, firmware, OS 4 Systems ODM, OEM 12 Industry Cloud, mobile, HPC, ML, automotive 78 Research Universities, Labs, other alliances 1,000+ Individuals RISC-V engineers and advocates In 2020, RISC-V membership grew 133%
  • 15. Dedicated Community 15 15 Services Fab, design services Press and Analysts Chip SoC, IP, FPGA Investors and Funding sources Universities and Research Industry cloud, mobile, HPC, ML, automotive I/O Memory, network, storage Software Dev tools, firmware, OS Individual Advocates
  • 16. Incredible industry progress • The European Processor Initiative finalized the first version of its RISC-V accelerator architecture and will deliver test chip in 2021. • The RIOS Lab announced PicoRio, an affordable RISC-V open source small-board computer available in 2021. • Imperas announced first RISC-V verification reference model with UVM encapsulation. • Seagate announced hard disk drive controller with high-performance RISC-V CPU. • GreenWaves ultra-low power GAP9 hearables platform enabling scene-aware and neural network-based noise reduction. • Alibaba unveiled RV64GCV core in its Xuantie 910 processor for cloud and edge servers. • Microchip released the first SoC FPGA development kit based on the RISC-V ISA. • Andes released superscalar multicore and L2 cache controller processors. • StarFive released the world’s first RISC-V AI visual processing platform • SiFive unveiled world’s fastest development board for RISC-V Personal Computers. • Micro Magic announced an incredibly fast 64- bit RISC-V core achieving 5GHz and 13,000 CoreMarks at 1.1V.
  • 17. RISC-V is the foundation of the open era of computing … 2,800+ individuals in 60+ RISC-V work groups and committees … 283 RISC-V solutions online including cores, SoCs, software, tools and developer boards. … 29 local RISC-V community groups, with more than 5,400 engineers … We’re in the news! We have 33k+ followers on social media and across the last year, we have participated in 135+ news articles along with amplifying RISC-V community news 450+ times.
  • 18. RISC-V delivers incredible member support Learning + Talent Multi-level online learning Connecting universities with labs, tests, and curricula RISC-V Training Partners Visibility Constant drumbeat through press, media, and original content Industry and regional events Dedicated RISC-V events Technical Deliverables Guard against fragmentation Build technical deliverables Work groups Compliance + Verification Testing and compliance suites Compliance tests Advocacy Technical advocate program Local developer groups and events RISC-V Ambassadors Geo and industry alliances Marketplace Exchange Online marketplace of providers, products, and services Technical developer forums
  • 19. Build RISC-V into your company strategy, and your personal mission RISC-V is a community of passionate, dedicated, and invested stakeholders As individuals As companies As universities As public institutions and non-profits As nations As one Global, connected movement 19
  • 20. “The future of American industry depends on open source tech, … RISC-V is gaining traction in the hardware manufacturing space throughout the world, because it lowers barriers to entry and increases chip development speed.” -- Wired “Though the architecture was created a decade ago by university professors, RISC-V has been building its ecosystem for years and has started to hit its stride with big licensees like Western Digital, SiFive, and even NVIDIA itself.” -- VentureBeat “If it succeeds, RISC-V could lower the cost of developing a new chip and help companies of all sizes to build exactly the processors they need.” -- Engadget
  • 22. Benefit of joining RISC-V ✔ Accelerate technical traction and insight ✔ Contribute technical priorities, approaches, and code ✔ Gain strategic and technical advantage ✔ Increase visibility, leadership, and market insight ✔ Fill and increase engineering skills, retain and attract talent ✔ Build innovation partner network and customer pipeline ✔ Deepen, engage, and lead in local and industry developer network ✔ Showcase RISC-V products, services, training, and resources
  • 23. Membership options Community Member Benefits • Accelerated development, reduced risk through open source, ratified ISA. • May participate in workgroups, influence strategy and adoption • 6 support programs in Technical Deliverables, Compliance, Visibility, Learning, Advocacy, and Marketplace • 1 voting Academic Board rep, • 1 non-voting Community Board rep • Member listing on RISC-V website • Event registration discount Strategic Member Benefits • Community level benefits plus… • Use of RISC-V Trademark for commercialization • 3 Board reps elected for tier, includes Premier members that do not otherwise have a board seat. • May lead workgroup and/or committee • Solution listing on RISC-V Exchange • 1 case study a year, 1 blog per month • 1 social media spotlight per month Premier Member Benefits • Community level benefits plus… • Use of RISC-V Trademark for commercialization • Board seat and Technical Steering Committee seat included for $250k level • Technical Steering Committee seat included for $100k level • Solution listing on RISC-V Exchange • 4 case studies a year, 2 blogs per month • 2 social media spotlights per month • Spotlight member profile • Inclusion in event promotions Premier Member Requirements • Membership open to any type of legal entity, not open to individual members • $250k Annual membership includes Board seat and Technical Steering Committee seat • $100k Annual membership includes TSC seat Strategic Member Requirements • Membership open to any type of legal entity, not open to individual members • Annual membership based on employee size • $35k for 5,000+ employees • $15k for 500-5,000 employees • $5k for <500 employees • $2.5k for <10 employees / company <2 years old Community Member Requirements • Membership open to academic institutions, non-profits, and individuals not representing a legal entity • No annual membership fee 23
  • 24. Horizontals (Attributes) Standing Committee Security Subcommittee Testing Subcommittee Crypto TG Security Response TG Performance Subcommittee Functional Safety SIG ISA Infrastructure Subcommittee Formal Model TG Architecture tests TG Documentation Debug revision TG Trace TG Nexus TG Simulators TG Embedded Subcommittee Code Size Reduction TS Unprivileged SC B (bitmanip) TG P (packed dec) TG Zfinx TG Alt FP Formats TG J (jit) TG V (vector) TG IMAFDCQ extensions Memory Model ・Opcodes ・L extension Privileged SC Hypervisor TG Virtual Memory TG Fast Interrupts TG Trusted Exec (TEE) TG Cache Mgmt (CMO) TG interrupts Privileged Spec 1.11 Verticals SC ・Automotive ・Consumer ・Datacenter ・Energy ・Finance ・Communications ・Defense RASD (Recoverability, Availability, Serviceability Dependability) TS ・Functional Safety ・E2E Data Integrity ・Diagnosability ・Recoverability ・PCIe error reporting ・Data poisoning containment ・Error recording ・Error reporting ・Error isolation Board of Directors (BOD) Technical Steering Committee (TSC) Chairs Software Standing Committee Profiles & Platform Subcommittee ・Linux class OSs ・RTOSs ・DMA ・Multi-processing ・Hypervisors ・JITs ・Overlays ・IOMMU, Buses ・Bootloaders ・Distro coord/build/rel ・*BIs Tool Chain & Runtimes Subcommittee HPC SIG Code Speed SIG EABI TG Managed Runtime TG DB/App TG AI/ML/NLP TG ・Native code ・GCC ・LLVM ・Optimizer ・Profiler ・gdb ・Profiles ・MCU profile ・Virtual machines ・Interpreters ・JITs ・Frameworks (Spark, Hadoop, etc.) ・Benchmarks ・Libraries ・Benchmarks ・Libraries ・Benchmarks SC: Standing Committee TS: Technical Subcommittee TG: Task Group SIG: Special Interest Completed Area of Responsibility Proposed SOC Infrastructure Subcommittee Config TG • Toolchain improvements • Further extensions Technical Groups
  • 25. RISC-V launched new programs to support member success  RISC-V Technical Steering Committee to govern technical strategy, build technical leadership and best practice decision-making  RISC-V Learn encompassing university curricula, online learning and Training Partners  RISC-V Ambassadors and Alliances to reach beyond our community for industry collaboration, leadership, and technical engagement.  RISC-V Exchange to showcase RISC-V cores, SoCs, developer boards, software, tools and other resources.
  • 26. From Embedded to Enterprise • The EU Horizon 2020 De-RISC platform for aerospace has achieved several hardware and software milestones since it began a year ago. • The School of Computing at the Tokyo Institute of Technology developed a portable Linux RISC-V SoC design in just 5,000 lines of Verilog. • Huami released a new RISC-V based AI chip for biometric wearables • CHIPS Alliance announced enhancements to the RISC-V SweRV Core EH2, the world’s first dual- threaded, commercial, embedded RISC-V core and SweRV Core EL2, an ultra-small, ultra-low-power RISC-V core. • Alibaba unveiled its RISC-V RV64GCV core that will be used for its Xuantie 910 processor aimed at cloud and edge servers.