![EE141
Multiplicationin Verilog
You can use the “*” operator to multiply two numbers:
wire [9:0] a,b;
wire [19:0] result = a*b; // unsigned multiplication!
If you want Verilog to treat your operands as signed two’s complement
numbers, add the keyword signed to your wire or reg declaration:
wire signed [9:0] a,b;
wire signed [19:0] result = a*b; // signed multiplication!
Remember: unlike addition and subtraction, you need different circuitry
if your multiplication operands are signed vs. unsigned. Same is true of
the >>> (arithmetic right shift) operator. To get signed operations all
operands must be signed.
wire signed [9:0] a;
wire [9:0] b;
wire signed [19:0] result = a*$signed(b);
To make a signed constant: 10’sh37C 23
2/23/2024](https://image.slidesharecdn.com/lecture21modf-240223060941-1880de94/85/unsigned-binary-numbers-Each-bit-of-the-10-320.jpg)
unsigned binary numbers Each bit of the
- 2. EE141 CombinationalMultiplier (unsigned) X3 X2 X1 X0 * Y3 Y2 Y1 Y0 + + + HA X3Y0 X2Y0 X1Y0 X0Y0 X3Y1 X2Y1 X1Y1 X0Y1 X3Y2 X2Y2 X1Y2 X0Y2 X3Y3 X2Y3 X1Y3 X0Y3 Z7 Z6 Z5 Z4 Z3 Z2 Z1 Z0 x3 FA x2 FA x1 FA x2 FA x1 HA x0 FA x1 HA x0 HA x0 FA x3 FA x2 FA x3 z0 z1 z2 z3 z4 z5 z6 z7 y3 y2 y1 y0 Propagation delay ~2N Partial products, one for each bit in multiplier (each bit needs just one AND gate) x3 x2 x1 x0 multiplicand multiplier 2/23/2024
- 3. Carry-Save Addition • Speeding up multiplication is a matter of speeding up the summing of the partial products. • “Carry-save” addition can help. • Carry-save addition passes (saves) the carries to the output, rather than propagating them. • Example: sum three numbers, 310 = 0011, 210 = 0010, 310 = 0011 310 0011 + 210 0010 c 0100 = 410 s 0001 = 110 310 0011 c 0010 = 210 s 0110 = 610 carry-save add carry-save add carry-propagate add 1000 = 810 • In general, carry-save addition takes in 3 numbers and produces 2. • Whereas, carry-propagate takes 2 and produces 1. • With this technique, we can avoid carry propagation until final addition 2/23/2024
- 4. Carry-save Circuits • When adding sets of numbers, carry-save can be used on all but the final sum. • Standard adder (carry propagate) is used for final sum. • Carry-save is fast (no carry propagation) and cheap (same cost as ripple adder) 2/23/2024
- 6. EE141 Combinational Multiplier (signed!) (-3) * (-2) (-3) 1 0 1 (X) (-2) * 1 1 0 (Y) 0 0 0 0 0 0 Y0*X = 0 + 1 1 1 0 1 2Y1*X = -6 - 1 1 0 1 4Y2*X = -12 (+6) 0 0 0 1 1 0 2/23/2024
- 7. EE141 CombinationalMultiplier (signed) X3 X2 X1 X0 * Y3 Y2 Y1 Y0 X3Y0 X3Y0 X3Y0 X3Y0 X3Y0 X2Y0 X1Y0 X0Y0 + X3Y1 X3Y1 X3Y1 X3Y1 X2Y1 X1Y1 X0Y1 + X3Y2 X3Y2 X3Y2 X2Y2 X1Y2 X0Y2 - X3Y3 X3Y3 X2Y3 X1Y3 X0Y3 Z7 Z6 Z5 Z4 Z3 Z2 Z1 Z0 x3 FA x2 FA x1 FA x2 FA x1 FA x0 FA x1 HA x0 HA x0 FA x3 FA x2 FA x3 x3 x2 x1 x0 z0 z1 z2 z3 z4 z5 z6 z7 y3 y2 y1 y0 FA FA FA FA FA FA FA 1 There are tricks we can use to eliminate the extra circuitry we added… 2/23/2024
- 8. EE141 2’sComplementMultiplication (Baugh-Wooley) X3 X2 X1 X0 * Y3 Y2 Y1 Y0 -------------------- X3Y0 X3Y0 X3Y0 X3Y0 X3Y0 X2Y0 X1Y0 X0Y0 + X3Y1 X3Y1 X3Y1 X3Y1 X2Y1 X1Y1 X0Y1 + X3Y2 X3Y2 X3Y2 X2Y2 X1Y2 X0Y2 - X3Y3 X3Y3 X2Y3 X1Y3 X0Y3 Z7 Z6 Z5 Z4 Z3 Z2 Z1 Z0 X3Y0 X2Y0 X1Y0 X0Y0 X3Y1 X2Y1 X1Y1 X0Y1 X2Y2 X1Y2 X0Y2 X3Y3 X2Y3 X1Y3 X0Y3 + + + + + 1 1 1 Step 1: two’s complement operands so high order bit is –2N-1. Must sign extend partial products and subtract the last one Step 3: add the ones to the partial products and propagate the carries. All the sign extension bits go away! Step 4: finish computing the constants… Result: multiplying 2’s complement operands takes just about same amount of hardware as multiplying unsigned operands! X3Y0 X2Y0 X1Y0 X0Y0 X3Y1 X2Y1 X1Y1 X0Y1 X2Y2 X1Y2 X0Y2 X3Y3 X2Y3 X1Y3 X0Y3 + + + + + - 1 1 1 1 1 Step 2: don’t want all those extra additions, so add a carefully chosen constant, remembering to subtract it at the end. Convert subtraction into add of (complement + 1). X3Y0 X3Y0 X3Y0 X3Y0 X3Y0 X2Y0 X1Y0 X0Y0 + 1 + X3Y1 X3Y1 X3Y1 X3Y1 X2Y1 X1Y1 X0Y1 + 1 + X3Y2 X3Y2 X3Y2 X2Y2 X1Y2 X0Y2 + 1 + X3Y3 X3Y3 X2Y3 X1Y3 X0Y3 + 1 + - 1 1 1 1 1 –B = ~B + 1 2/23/2024
- 9. EE141 2’sComplementMultiplication FA x3 FA x2 FA x1 FA x2 FA x1 HA x0 FA x1 HA x0 HA x0 FA x3 FA x2 FA x3 HA 1 1 x3 x2 x1 x0 z0 z1 z2 z3 z4 z5 z6 z7 y3 y2 y1 y0 22 2/23/2024
- 10. EE141 Multiplicationin Verilog You can use the “*” operator to multiply two numbers: wire [9:0] a,b; wire [19:0] result = a*b; // unsigned multiplication! If you want Verilog to treat your operands as signed two’s complement numbers, add the keyword signed to your wire or reg declaration: wire signed [9:0] a,b; wire signed [19:0] result = a*b; // signed multiplication! Remember: unlike addition and subtraction, you need different circuitry if your multiplication operands are signed vs. unsigned. Same is true of the >>> (arithmetic right shift) operator. To get signed operations all operands must be signed. wire signed [9:0] a; wire [9:0] b; wire signed [19:0] result = a*$signed(b); To make a signed constant: 10’sh37C 23 2/23/2024