very large scale integration _Introduction 2
- 1. VLSI
- 2. CONTENTS 1. MOS Transistors 2. CMOS Logic 3. Long-channel I-V Characteristics 4. Non-ideal I-V Effects 5. DC Transfer Characteristics.
- 3. 1.MOS Transistors • A MOSFET (Metal Oxide Semiconductor Field Effect Transistor), or MOS, as is commonly called, is an electronic device which converts change in input voltage into a change in output current. • A MOSFET is a four-terminal device having source(S), gate (G), drain (D) and body (B) terminals. In general, The body of the MOSFET is in connection with the source terminal thus forming a three-terminal device such as a field-effect transistor. MOSFET is generally considered as a transistor and employed in both the analog and digital circuits.
- 4. A MOSFET can function in two ways 1. Depletion Mode:When there is no voltage across the gate terminal, the channel shows its maximum conductance. Whereas when the voltage across the gate terminal is either positive or negative, then the channel conductivity decreases.
- 5. 2. Enhancement Mode : When there is no voltage across the gate terminal, then the device does not conduct. When there is the maximum voltage across the gate terminal, then the device shows enhanced conductivity.
- 6. Principle of MOS transistor • Working Principle of MOSFET. The main principle of the MOSFET device is to be able to control the voltage and current flow between the source and drain terminals. It works almost like a switch and the functionality of the device is based on the MOS capacitor. The MOS capacitor is the main part of MOSFET.
- 7. P-Channel MOSFET • The P- channel MOSFET has a P- Channel region located in between the source and drain terminals. It is a four-terminal device having the terminals as gate, drain, source, and body. The drain and source are heavily doped p+ region and the body or substrate is of n-type. The flow of current is in the direction of positively charged holes. • When we apply the negative voltage with repulsive force at the gate terminal, then the electrons present under the oxide layer are pushed downwards into the substrate. The depletion region populated by the bound positive charges which are associated with the donor atoms. The negative gate voltage also attracts holes from the p+ source and drain region into the channel region.
- 8. N-Channel MOSFET • The N-Channel MOSFET has an N- channel region located in between the source and drain terminals. It is a four-terminal device having the terminals as gate, drain, source, body. In this type of Field Effect Transistor, the drain and source are heavily doped n+ region and the substrate or body are of P-type. • The current flow in this type of MOSFET happens because of negatively charged electrons. When we apply the positive voltage with repulsive force at the gate terminal then the holes present under the oxide layer are pushed downward into the substrate. The depletion region is populated by the bound negative charges which are associated with the acceptor atoms.
- 9. 2.CMOS Logic • A circuit that uses complementary pairs of p-channel and n-channel MOSFETs is called CMOS (Complementary MOS). CMOS logic ICs combine MOSFETs in various ways to implement logic functions. • A logic gate composed of a single pair of p-channel and n-channel MOSFETs is called an inverter.
- 10. BASIC GATES USING CMOS LOGIC
- 11. 3.Long-channel I-V Characteristics Depending on the value of the gate voltage, we have three modes (accumulation, depletion and inversion) as discussed above. We can also have different regions of operations in a MOSFET: 1. Cut off : Vg<Vt and no inversion layer between source and the drain is formed. 2. Linear/Resistive/Triode/Unsaturated: Vg>Vt and Vds<(Vgs-Vt). The inversion layer is formed between the source and the drain. The current through the channel (the inversion layer) depends upon the voltage difference between source and the drain. If there is no voltage difference between the source and the drain, the current through the channel should be 0, regardless of the value of the gate voltage. There is an approximate linear relationship between the current though the channel and Vds hence this region of operation is called the linear or resistive region. 3. Saturation region: Vg>Vt and Vds>(Vgs-Vt). The current through the channel reaches its maximum value and becomes independent of Vds. The current through the channel and Vds no longer have a linear relationship.
- 12. 4.Non-ideal I-V Effects • The Shockley transistor model derived a current-voltage expression for an ideal transistor and failed to consider many prominent non-ideal characteristics. 1. Mobility degradation 2. Velocity Saturation 3. Body effect 4. Drain induced barrier lowering (DIBL) 5. Channel length modulation 6. Sub-threshold Conduction 7. Gate leakage
- 13. 5.DC Transfer Characteristics. • A complementary CMOS inverter consists of a p-type and an n-type device connected in series. • The DC transfer characteristics of the inverter are a function of the output voltage (Vout) with respect to the input voltage (Vin). • The MOS device first order Shockley equations describing the transistors in cutoff, linear and saturation modes can be used to generate the transfer characteristics of a CMOS inverter. • Plotting these equations for both the n- and p-type devices produces the traces below.
- 14. • The DC transfer characteristic curve is determined by plotting the common points of Vgs intersection after taking the absolute value of the p-device IV curves, reflecting them about the x-axis and superimposing them on the ndevice IV curves. • We basically solve for Vin(ntype) = Vin(p-type) and Ids(ntype)=Ids(p-type) • The desired switching point must be designed to be 50 % of magnitude of the supply voltage i.e. VDD/2. • Analysis of the superimposed n-type and p-type IV curves results in five regions in which the inverter operates. • Region A occurs when 0 leqVin leq Vt(n-type). The n-device is in cut-off (Idsn =0). p-device is in linear region, Idsn = 0 therefore -Idsp = 0 Vdsp = Vout – VDD, but Vdsp =0 leading to an output of Vout = VDD.
- 15. • Region B occurs when the condition Vtn leq Vin le VDD/2 is met. Here p-device is in its nonsaturated region Vds neq 0. n-device is in saturation • In region C Idsp is governed by voltages Vgs and Vds described by Saturation currents for the two devices • Region D is defined by the inequality p-device is in saturation while n-device is in its non-saturation region. Equating the drain currents allows us to solve for Vout. • In Region E the input condition satisfies: The p-type device is in cut-off: Idsp=0 The n-type device is in linear mode Vgsp = Vin –VDD and this is a more positive value compared to Vtp. Vout = 0