Mca2050 computer architecture
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The document provides information about a computer architecture assignment for semester 2 of an MCA program, including a list of topics and questions related to processes, threads, hazards in CPU design, vector instructions, and dual-core technology. It encourages students to send their semester and specialization to a provided email for fully solved assignments. Each question has specific requirements regarding the depth of answers and marks distribution.
![Dear students get fully solved assignments
Send your semester & Specialization name to our mail id :
“ help.mbaassignments@gmail.com ”
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(FALL 2014) ASSIGNMENT
PROGRAM MCA (Revised Fall 2012)
SEMESTER 2
SUBJECT CODE & NAME MCA2050- COMPUTER ARCHITECTURE
CREDIT 2
BK ID B1405
MAX.MARKS 60
Note: Answer all questions. Kindly note that answers for 10 marks questions should be
approximately of 400 words. Each question is followed by evaluation scheme.
1. What is the difference between process and thread?
Answer : A process is an executing instance of an application. What does that mean? Well, for
example, when you double-click the Microsoft Word icon, you start a process that runs Word. A
thread is a path of execution within a process. Also, a process can contain multiple threads. When
you start Word, the operating system creates a process and begins executing the primary thread of
that process.
It’s important to note that a thread can do anything a process can do. But since a process can consist
of multiple threads, a thread could be considered a ‘lightweight’ process. Thus, the essential
difference between a thread and a process is the
2. Explain in detail the techniques to handle hazards.
Answer : In the domain of central processing unit (CPU) design, hazards are problems with the
instruction pipeline in CPU microarchitectures when the next instruction cannot execute in the
following clock cycle,[1] and can potentially lead to incorrect computation results. There are typically
three types of hazards:[2]
data hazards
structural hazards
control hazards (branching hazards)
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Mca2050 computer architecture
- 1. Dear students get fully solved assignments Send your semester & Specialization name to our mail id : “ [email protected] ” or Call us at : 08263069601 (FALL 2014) ASSIGNMENT PROGRAM MCA (Revised Fall 2012) SEMESTER 2 SUBJECT CODE & NAME MCA2050- COMPUTER ARCHITECTURE CREDIT 2 BK ID B1405 MAX.MARKS 60 Note: Answer all questions. Kindly note that answers for 10 marks questions should be approximately of 400 words. Each question is followed by evaluation scheme. 1. What is the difference between process and thread? Answer : A process is an executing instance of an application. What does that mean? Well, for example, when you double-click the Microsoft Word icon, you start a process that runs Word. A thread is a path of execution within a process. Also, a process can contain multiple threads. When you start Word, the operating system creates a process and begins executing the primary thread of that process. It’s important to note that a thread can do anything a process can do. But since a process can consist of multiple threads, a thread could be considered a ‘lightweight’ process. Thus, the essential difference between a thread and a process is the 2. Explain in detail the techniques to handle hazards. Answer : In the domain of central processing unit (CPU) design, hazards are problems with the instruction pipeline in CPU microarchitectures when the next instruction cannot execute in the following clock cycle,[1] and can potentially lead to incorrect computation results. There are typically three types of hazards:[2] data hazards structural hazards control hazards (branching hazards)
- 2. 3. Explain the Tumasulo approach. Write the differences between Tomasulo’s scheme and score boarding. Answer : An instruction fetch proceeds with the issue stage and may fetch either into a single-entry latch or into a queue; instructions are then issued from the latch or queue. The EX stage follows the read operands stage, just as in the DLX pipeline. As in the DLX floating-point pipeline, execution may take multiple cycles, depending on the operation. Thus, we may need to distinguish when an instruction begins execution and when it completes execution; between the two times, the instruction is in execution. This allows multiple instructions to be 4. Explain any five types of vector instructions in detail. Answer : five types of vector instructions are below : 1. Elemental Vector Operations The Cray X1 system vector instruction set contains vector versions of most scalar integer functions, floating-point functions, and memory references. These elemental vector operations process each element independently. They execute under control of a mask register (m0,...,m3) and the vector length register (vl). Though there are 8 mask registers, only the first 4 can be used in the vector instructions. The assembler's default controlling mask register is m0. By software convention, every bit in m0 is always set. In the vector result of an elemental vector 5 Differentiate between multiprocessor and multi-computer. Answer : The difference between a multiprocessor system and a multicomputer system is the number of computers involved in each. Both are multiprocessing environments: Both use more than one CPU at a time. A multiprocessor system is a single computer that operates with multiple CPUs, and a multicomputer system is a cluster of computers that operate as a singular computer. Multiprocessing environments can operate with CPUs sharing an operating system -- called symmetric multiprocessing -- or with each CPU running an individual instance of the operating system -- called Massively Parallel Processing. 6 Write short notes on: a) DSP Processor Answer : A Digital Signal Processor, or DSP, is a specialized microprocessor that has an architecture which is optimized for the fast operational needs of digital signal processing. A Digital Signal Processor (DSP) can process data in real time, making it ideal for applications that can’t tolerate delays. Digital signal processors take a digital signal and process it to improve the signal into clearer sound, faster data or sharper images. Digital Si
- 3. b) Dual core technology Answer : Dual core technology refers to two individual microprocessors on a single die cast chip. This is essentially two computer processing units (CPUs) in one. The advantage of a this type of chip is that tasks can be carried out in parallel streams, decreasing processing time. This is referred to as thread-level parallelism (TLP). TLP is also possible on motherboards that can accommodate two separate CPU dies. When TLP is accomplished in a single CPU through dual core technology, it is called chip-level multiprocessing (CLM). Dear students get fully solved assignments Send your semester & Specialization name to our mail id : “ [email protected] ” or Call us at : 08263069601