hw: configurable A_DLY SRAM pin #54
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Documentation says it must be tied to HIGH. This was mistakenly tied low which changes the internal timings of the SRAM and can make some of them inoperable. Now it is configurable in soc_ctrl.
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Documentation says it must be tied to HIGH.
This was mistakenly tied low which changes the internal timings of the SRAM and can make some of them inoperable. Now it is configurable in soc_ctrl.