Engineering:Neural processing unit

From HandWiki
Short description: Hardware acceleration unit for artificial intelligence tasks

A neural processing unit (NPU), also known as AI accelerator or deep learning processor, is a class of specialized hardware accelerator[1] or computer system[2][3] designed to accelerate artificial intelligence (AI) and machine learning applications, including artificial neural networks and computer vision.

Use

Their purpose is either to efficiently execute already trained AI models (inference) or to train AI models. Their applications include algorithms for robotics, Internet of things, and data-intensive or sensor-driven tasks.[4] They are often manycore or spatial designs and focus on low-precision arithmetic, novel dataflow architectures, or in-memory computing capability. As of 2024, a typical datacenter-grade AI integrated circuit chip, the H100 GPU, contains tens of billions of MOSFETs.[5]

Consumer devices

AI accelerators are used in mobile devices such as Apple iPhones, AMD AI engines[6] in Versal and NPUs, Huawei, and Google Pixel smartphones,[7] and seen in many Apple silicon, Qualcomm, Samsung, and Google Tensor smartphone processors.[8]

It is more recently (circa 2022) added to computer processors from Intel,[9] AMD,[10] and Apple silicon.[11] All models of Intel Meteor Lake processors have a built-in versatile processor unit (VPU) for accelerating inference for computer vision and deep learning.[12]

On consumer devices, the NPU is intended to be small, power-efficient, but reasonably fast when used to run small models. To do this they are designed to support low-bitwidth operations using data types such as INT4, INT8, FP8, and FP16. A common metric is trillions of operations per second (TOPS), though this metric alone does not quantify which kind of operations are being performed.[13]

Datacenters

Accelerators are used in cloud computing servers, including tensor processing units (TPU) in Google Cloud Platform[14] and Trainium and Inferentia chips in Amazon Web Services.[15] Many vendor-specific terms exist for devices in this category, and it is an emerging technology without a dominant design.

Since the late 2010s, graphics processing units designed by companies such as Nvidia and AMD often include AI-specific hardware in the form of dedicated functional units for low-precision matrix-multiplication operations. These GPUs are commonly used as AI accelerators, both for training and inference.[16]

Programming

Mobile NPU vendors typically provide their own application programming interface such as the Snapdragon Neural Processing Engine. An operating system or a higher-level library may provide a more generic interface such as TensorFlow Lite with LiteRT Next (Android) or CoreML (iOS, macOS).

Consumer CPU-integrated NPUs are accessible through vendor-specific APIs. AMD (Ryzen AI), Intel (OpenVINO), Apple silicon (CoreML)[lower-alpha 1] each have their own APIs, which can be built upon by a higher-level library.

GPUs generally use existing GPGPU pipelines such as CUDA and OpenCL adapted for lower precisions. Custom-built systems such as the Google TPU use private interfaces.

Notes

  1. ↑ MLX builds atop the CPU and GPU parts, not the Apple Neural Engine (ANE) part of Apple Silicon chips. The relatively good performance is due to the use of a large, fast unified memory design.

See also

References

  1. ↑ "Intel unveils Movidius Compute Stick USB AI Accelerator". July 21, 2017. https://www.v3.co.uk/v3-uk/news/3014293/intel-unveils-movidius-compute-stick-usb-ai-accelerator. 
  2. ↑ "Inspurs unveils GX4 AI Accelerator". June 21, 2017. https://insidehpc.com/2017/06/inspurs-unveils-gx4-ai-accelerator/. 
  3. ↑ Wiggers, Kyle (November 6, 2019), Neural Magic raises $15 million to boost AI inferencing speed on off-the-shelf processors, https://venturebeat.com/2019/11/06/neural-magic-raises-15-million-to-boost-ai-training-speed-on-off-the-shelf-processors/, retrieved March 14, 2020 
  4. ↑ "Google Designing AI Processors". May 18, 2016. https://www.eetimes.com/google-designing-ai-processors/.  Google using its own AI accelerators.
  5. ↑ Moss, Sebastian (2022-03-23). "Nvidia reveals new Hopper H100 GPU, with 80 billion transistors". https://www.datacenterdynamics.com/en/news/nvidia-reveals-new-hopper-h100-gpu-with-80-billion-transistors/. 
  6. ↑ Brown, Nick (2023-02-12). "Exploring the Versal AI Engines for Accelerating Stencil-based Atmospheric Advection Simulation". Proceedings of the 2023 ACM/SIGDA International Symposium on Field Programmable Gate Arrays. FPGA '23. New York, NY, USA: Association for Computing Machinery. pp. 91–97. doi:10.1145/3543622.3573047. ISBN 978-1-4503-9417-8. https://dl.acm.org/doi/10.1145/3543622.3573047. 
  7. ↑ "HUAWEI Reveals the Future of Mobile AI at IFA". https://consumer.huawei.com/en/press/news/2017/ifa2017-kirin970. 
  8. ↑ "Snapdragon 8 Gen 3 mobile platform". https://docs.qualcomm.com/bundle/publicresource/87-71408-1_REV_B_Snapdragon_8_gen_3_Mobile_Platform_Product_Brief.pdf. 
  9. ↑ "Intel's Lunar Lake Processors Arriving Q3 2024". May 20, 2024. https://www.intel.com/content/www/us/en/newsroom/news/intels-lunar-lake-processors-arriving-q3-2024.html. 
  10. ↑ "AMD XDNA Architecture". https://www.amd.com/en/technologies/xdna.html. 
  11. ↑ "Deploying Transformers on the Apple Neural Engine" (in en-US). https://machinelearning.apple.com/research/neural-engine-transformers. 
  12. ↑ "Intel to Bring a 'VPU' Processor Unit to 14th Gen Meteor Lake Chips". August 2022. https://www.pcmag.com/news/intel-to-bring-a-vpu-processor-unit-to-14th-gen-meteor-lake-chips. 
  13. ↑ "A guide to AI TOPS and NPU performance metrics". https://www.qualcomm.com/news/onq/2024/04/a-guide-to-ai-tops-and-npu-performance-metrics. 
  14. ↑ Jouppi, Norman P. et al. (2017-06-24). "In-Datacenter Performance Analysis of a Tensor Processing Unit" (in EN). ACM SIGARCH Computer Architecture News 45 (2): 1–12. doi:10.1145/3140659.3080246. 
  15. ↑ "How silicon innovation became the 'secret sauce' behind AWS's success". July 27, 2022. https://www.amazon.science/how-silicon-innovation-became-the-secret-sauce-behind-awss-success. 
  16. ↑ Patel, Dylan; Nishball, Daniel; Xie, Myron (2023-11-09). "Nvidia's New China AI Chips Circumvent US Restrictions". https://www.semianalysis.com/p/nvidias-new-china-ai-chips-circumvent. 



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