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Zuverlässigkeitsanalyse fehlertoleranter Architekturen mit temporaler Logik

Reliability Analysis of Fault-Tolerant Computer Architectures using Temporal Logic
  • K. D. Heidtmann
Published/Copyright: January 1, 1993

Published Online: 1993-01
Published in Print: 1993-01

© 2013 Oldenbourg Wissenschaftsverlag GmbH, Rosenheimer Str. 145, 81671 München

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